Design of a Novel Multilevel Inverter

This study proposes a brand-new multilayer inverter topology. By combining two well-known topologies, such as the multilevel inverter topology with multiple strings and the cascaded H-bridge topology, we propose a novel multilevel inverter architecture with fewer devices. The “reduce device count” concept was developed with the goal of reducing hardware size, cost, and complexity. With only ten switching components and four DC power sources, we can achieve an output level of 31 with this topology. The approach and system design of the proposed multilevel inverter system are described in detail and their validity is verified by simulation results.